Renesas Electronics /R7FA6T2BD /SPI_B0 /SPCR2

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Interpret as SPCR2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RMFM0 (RMEDTG)RMEDTG 0 (RMSTTG)RMSTTG 0SPDRC0 (0)SPLP 0 (0)SPLP2 0 (0)MOIFV 0 (0)MOIFE

SPLP2=0, MOIFV=0, SPLP=0, MOIFE=0

Description

SPI Control Register 2

Fields

RMFM

Frame processing count setting in Master Receive only

RMEDTG

End Trigger in Master Receive only

1 (1): Receive End (Writable only when Master Receive only) Reading value is always 0

RMSTTG

Start Trigger in Master Receive only

1 (1): Receive Start (Writable only when Master Receive only) Reading value is always 0

SPDRC

SPI received data ready detect adjustment

SPLP

SPI Loopback

0 (0): Normal mode

1 (1): Loopback mode (inverted transmit data = receive data)

SPLP2

SPI Loopback 2

0 (0): Normal mode

1 (1): Loopback mode (transmit data = receive data)

MOIFV

MOSI Idle Fixed Value

0 (0): The fixed value of MOSI idle = 0.

1 (1): The fixed value of MOSI idle = 1.

MOIFE

MOSI Idle Fixed Value Enable

0 (0): The MOSI output value is the last data of previous transfer.

1 (1): The MOSI output value is the set MOIFV bit value.

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